In a communication system, a data bitstream is transmitted at a particular bit rate. The data bitstream transitions from high to low, or vice versa, responsive to a clock signal at the transmitter.
However, the receiver operates on a receiver clock signal that has a different period, and phase relationship with the transmitter clock signal. Accordingly, sampling the data signal at the rate of the receiver clock signal is not suitable.
Additionally, the ratio of the receiver clock signal to the transmitter clock signal is likely to be a mixed number (number comprising the sum of an integer and a fraction). As a result, sampling the data signal after a fixed number of receiver clock signal edges may also be unsuitable.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with embodiments presented in the remainder of the present application with references to the drawings.